Reply to message # 513
@ Ufopolitics,

Thanks for sharing the V1 test video and your scope observations.

From what you describe nice symmetric AC sine centered around 0, channels aligning, and input current dropping with frequency, this looks more like a **measurement/topology/recirculation issue** than anything "mystical" in the coils.

A few practical checks that usually catch this fast:

1. **Probe references:** If you're probing "#1 negative" and "#8 positive" node-to-node, you can naturally see a bipolar waveform even if each node is PWM relative to the DC bus. 

Try measuring **each node to DC- (0V)**, and also measure **the differential (#8 – #1)** as a separate view.

2. **Check gate waveforms:** Before the coil nodes, scope the **PFET Vgs** and **NFET Vgs** gate-to-source.

That will confirm whether your intended offset/phase shift is actually present, and whether the devices are switching the way you think.

3. **Recirculation / flyback:**

The fact that Amps drop as Frequency rises suggests the inductor current may be **collapsing toward zero** each cycle or being forced into reversal.

Make sure you have a clear **freewheel/recirculation path** during the "off" period diode path or synchronous recirc, otherwise field strength will fall with higher frequency.

4. **Bus sag / limiting:** It is also worth watching the **DC bus voltage at the driver** while you increase frequency to ensure the supply or wiring is not sagging or hitting protection.

If you can post a screenshot of: (a) PFET Vgs, 
(b) NFET Vgs, 
(c) node #1 to 0V, 
(d) node #8 to 0V. 
Then it will be much easier to pinpoint whether it is probing, sequencing logic, or recirculation.

Regards, Alex

Quote from: kampen on Dec 27, 2025, 02:14 PMReply to message # 513
@ Ufopolitics,

Thanks for sharing the V1 test video and your scope observations.

From what you describe nice symmetric AC sine centered around 0, channels aligning, and input current dropping with frequency, this looks more like a **measurement/topology/recirculation issue** than anything "mystical" in the coils.

A few practical checks that usually catch this fast:

1. **Probe references:** If you're probing "#1 negative" and "#8 positive" node-to-node, you can naturally see a bipolar waveform even if each node is PWM relative to the DC bus.

Try measuring **each node to DC- (0V)**, and also measure **the differential (#8 – #1)** as a separate view.

2. **Check gate waveforms:** Before the coil nodes, scope the **PFET Vgs** and **NFET Vgs** gate-to-source.

That will confirm whether your intended offset/phase shift is actually present, and whether the devices are switching the way you think.

3. **Recirculation / flyback:**

The fact that Amps drop as Frequency rises suggests the inductor current may be **collapsing toward zero** each cycle or being forced into reversal.

Make sure you have a clear **freewheel/recirculation path** during the "off" period diode path or synchronous recirc, otherwise field strength will fall with higher frequency.

4. **Bus sag / limiting:** It is also worth watching the **DC bus voltage at the driver** while you increase frequency to ensure the supply or wiring is not sagging or hitting protection.

If you can post a screenshot of: (a) PFET Vgs,
(b) NFET Vgs,
(c) node #1 to 0V,
(d) node #8 to 0V.
Then it will be much easier to pinpoint whether it is probing, sequencing logic, or recirculation.

Regards, Alex

@kampen:Thanks dear friend,

Ok, so let me see if I understand clearly what you are saying above...

Let me start by your point#4

Quote4. **Bus sag / limiting:** It is also worth watching the **DC bus voltage at the driver** while you increase frequency to ensure the supply or wiring is not sagging or hitting protection.

I know what you mean there (I believe so...)...and so, I believe it is not the issue here...just because this PSU is 600 Watts, and at 40V it can go as high as 15 Amps [or close to] (40X15=600W) so, I believe this is not the case or a "current limiting" issue from the Source (PSU).

Quote1. **Probe references:** If you're probing "#1 negative" and "#8 positive" node-to-node, you can naturally see a bipolar waveform even if each node is PWM relative to the DC bus.

Try measuring **each node to DC- (0V)**, and also measure **the differential (#8 – #1)** as a separate view.

Let me see if here I understand you correctly:

Ok, so, I should connect BOTH Probes ground (alligator clips) to 0V or Negative from Source (PSU) then each Probe to #1 Negative and  #8 Positive?

Quote2. **Check gate waveforms:** Before the coil nodes, scope the **PFET Vgs** and **NFET Vgs** gate-to-source.

Here I am kind of lost...

Gate you mean the Input from Logic Board?...or should I try to locate the real Gate connection for each FET on the FET circuit Boards?
Source -as I understand it- is the Input from PSU to FET Boards...correct?
Because the Drains are the Output to Coils...right?...and we are talking Gate-Source here.

Quote3. **Recirculation / flyback:**

The fact that Amps drop as Frequency rises suggests the inductor current may be **collapsing toward zero** each cycle or being forced into reversal.

Make sure you have a clear **freewheel/recirculation path** during the "off" period diode path or synchronous recirc, otherwise field strength will fall with higher frequency.

Could you show here a Diagram of what you are referring to?
You are mentioning a 'flyback diode' here...lost as to where...sorry.

QuoteIf you can post a screenshot of: (a) PFET Vgs,
(b) NFET Vgs,
(c) node #1 to 0V,
(d) node #8 to 0V.
Then it will be much easier to pinpoint whether it is probing, sequencing logic, or recirculation.

Ok, as I mentioned previously...you mean to connect the Probes Gator Clips (Ground) to 0V (-) from Source Negative, then each probe to #1 Negative and #8 Positive?


Thanks for your help!!

Ufopolitics

@kampen

Ok, on this screen shot I have the Scope Ground (Gator Clip) referenced to 0V:


I guess that is what you meant...because now I am seeing the Square Signals on both, Positive #8 and Negative #1

On Image below I circled in RED the Probe Clip connected to 0V:


Thanks!!

Ufopolitics

Reply to message #516
>Let me start by your point#4<

@ Ufopolitics,

On the PSU point: a "600 W / 15 A at 40 V" rating does not automatically rule out limiting or sag in this kind of test.

With inductive loads and switching, the issue is often **transient response at the driver**, wiring resistance/inductance, or PSU protection dynamics, not just the nameplate Watts.

A quick way to confirm is to scope **Vbus directly at the MOSFET board** (not at the PSU terminals) while you sweep frequency, and compare it with the coil waveform.

Also, the "clean symmetric AC sine" you are seeing is exactly what you would expect if the power stage is effectively producing **bipolar drive** or diode-dominated freewheel and the inductance is filtering it.

To isolate whether the problem is logic or power stage, I suggest:

1. Probe gate signals for coil #1 and #8 (logic/gates) and confirm the intended **phase offset + deadtime** really exists before the power stage.
2. Measure the **coil voltage across the coil** (differential if possible), not just node-to-ground.
3. Measure coil current (shunt or current probe).

One more note: with an inductive load, **current naturally drops as frequency rises** unless you compensate (higher voltage/duty or current control), so the "Amps falling with Frequency" may be normal rather than proof the field is collapsing.

If you can share a screenshot of: Vbus-at-board, Vcoil across coil, and gate signals for #1 and #8, it will be much easier to pinpoint whether it is wiring/phase mapping, bridge commutation mode, or bus dynamics.

Regards, Alex

Reply to message #517

Great and Yes, that is exactly the effect I was referring to.

When the scope ground is not referenced to true 0V, probing between two switching nodes can make the waveform look like a clean AC sine even if each node is actually switching.
With the gator clip tied to PSU 0V, you are now seeing the real square/PWM behavior at Pin #1 and #8 relative to ground.

Next step: probe #1→0V and #8→0V on two channels, then (if possible) use CH1–CH2 math to see the actual coil differential voltage and confirm the intended phase offset.

Regards, Alex

If you upload the two screenshots, I can also tell you whether the timing/offset looks right at a glance.