Not at the archive site either? https://overunityarchives.com/index.php
thay

Quote from: forest on Oct 29, 2025, 03:23 PMReminds me Tito L.Oracion "double ram" circuit from old energy amplification thread on overunity.com site. Unfortunately this thread is not archived anywhere and this simple circuit is lost

Hello Forest,

I've found the Thread at: https://overunityarchives.com/index.php/topic,6763.0.html

However, we lost all graphics since the attachments folder when Stefan gave it to me does not contain the full database.

Thread has over 1770 pages...but I read -on first 4 pages- that Tito decided not to keep disclosing his full circuit... cause he want to make money out of it...unfortunately...

Regards

Ufopolitics

Tito's "double ram" circuit was mechanical device with two diodes working very similar to the schematic you posted , which fulfiled his thesis on device do not consuming much electricity from energy source while generating more output . This was his starting point. I believe he ended with a device working  at radio frequencies. I even suspect he could be Maxwell Chikumbutso. 

Ufopolitics, thank you for this diagram.
Your message #403
Oct 28, 2025, 02:26 AM

Now I can clearly identify exactly what is going on electrically,
and what changes are required for the boost-recovery design to work safely and efficiently with this hardware.

What the current setup is doing:
The SS Overlapping PC boards are.
Opto-isolated P-FET / N-FET half-bridge drivers
 Driving two rows of 7 coils (13 total with an overlap coil)
 Each row is sequenced to create a shifting magnetic field
 Powered by four separate low-voltage supplies (PSU1–PSU4)
The F1 and F2 coils on the ends provide return paths and likely magnetic symmetry.

What is missing for the boost-energy-recovery goal
These PC boards do not provide:
A current-safe flyback discharge path to a higher-voltage energy rail
Must add one diode per coil to the +48 V cap bank
A low-side switching reference
The current design drives both High-side + Low-side on every coil
 → This makes energy recovery impossible because the coil collapse is trapped
 → MOSFETs see reverse conduction through body diodes (danger!)
A common +48 V DC output bus (the recovered energy destination)

If we attempt to boost capture on this current design
The flyback Voltage will:
Hit the P-FET body diode → push energy back to the 12 V supplies
Stress N-FET Vgs and Vds beyond the safe levels
Possibly destroy MOSFETs/Opto drivers
The current wiring is NOT COMPATIBLE with the dual-diode boost schematic.

Thanks my Dear Friend  Alex!

YES!, you are completely right!
And if you look at the last line on EDIT of that post, I wrote it...it will not work!..I didit after ending the post:

Quote from: Ufopolitics on Oct 28, 2025, 02:26 AM[...]
EDIT 1: One thing I noted about this circuit, is that we can NO LONGER use a Diode for each PFET and NFET to Coil, like before Kampen have it on his setup...since energy will SPLIT BACK BOTH WAYS to E-CAP and ALLOW BOTH FETS to get REVERSED VOLTAGES...not good!!
But I trust Kampen knowledge about his own circuit and ability to bypass this error...
Cheers

Then, later on, I analyzed the booster application per single coil, and it WILL NOT WORK EITHER!!

As I also analized even the SINGLE DIODE PROTECTION, like you have shown on your setup image...and it WILL NOT WORK EITHER!!

Please, allow me to show my simple analysis in just Two Images:


So, on above image, we are powering Group #7, meaning BOTH NFET & PFET #7 are ON (closed). And we are on the RETURN SEQUENCE from #7 back to #1...

Fine...Now let me show you the NEXT STEP or Powering Group #6:

Here the "FAILURE" of Single Diode Protection is very clear...

As soon as Coil #7 (On the Positive Side) is OFF (Disconnected)...HV REVERSAL takes place...

Negative Reversed HV going DIRECTLY to PFET #7...and DIODE #7 will not offer ANY OPPOSITION TO the NEGATIVE REVERSED VOLTAGE FLOW.

Now, it is only "my assumption" that the "ENTERING" Coils on the Sequence, (SINCE THERE IS NO 'DISCONNECTION') will NOT suffer that much of this reversal, because it is FURTHER AWAY from Positive entrance, therefore the whole resistance from all SIX Coils PLUS the Positive entrance of Input Voltage and Currents will make it "LESS DESTRUCTIVE"...
Some kind of "ATTENUATION" will take place...I do NOT know for CERTAIN it would be so.

Nevertheless, considering the "entering coils will not suffer damage...ALL THE "LEAVING" COILS BEING DISCONNECTED WILL CAUSE SEVERE DAMAG TO FET'S

ANYWAYS on the next half cycle sequence, or going back from #1 to #7...then ALL THE NEGATIVE BANK will be ""LEAVING" THE TRAIL COILS...therefore, willo be sending ALL REVERSED VOLTAGES back to ALL NFET'S.

CONCLUDING: That even setting SINGLE DIODES PER EACH COIL, WILL NOT WORK EITHER.

Truly sorry that we are "back to zero" again, my Friend!!...

However, I have a couple of solutions on the Next Post...hope we agree to at least one of them.

Regards

Ufopolitics