Hello to All,
Thanks to the great Contribution (and Patience) from Member
@kampen, we have finally arrived at the latest setup of a Solid-State Driver, specifically designed for the latest Figuera Generator,
based on Dual Simultaneous Switching (DSS) of Positive and Negative Exciter Coils Sequence.
We agree since the beginning to make a Driver that will be a "Plug and Play" design, meaning, no Microprocessors that would need to be programmed.
The Basic Principle starts from a Logic Board, powered by low voltage, low amperage (12V and mA), and conducting the Sequence that we need, 1 to 8 then 8 to 1.
Logic Board is based on NAND Gate Drivers and Sequential IC's.
Then, the Two Executing, Switching Boards, based on P-FET's and N-FET's, separately.
So, on the N-FET Board we Input to Source the Higher Voltage Negative DC to Coils.
As on the P-FET Board we Input to High Side Source, the Positive DC to the switching Coils.
Here is a very Basic Block Diagram of Driver, please, realize that the "Executing Board" is actually based on Two Boards, for P & N MOSFET'S, NOT specified here:
BASIC_DRIVER_FUNCTIONS.png
On this Topic, I will be showing all specific details about ALL Circuit Boards, Components Spec's required as also Boards Manufacture designs.
Regards
Ufopolitics
Hello All,
THE ELECTROMAGNETIC RELAY PRINCIPLE
This Method of switching is basically similar to the way an Electromagnetic Relay works:
BASIC_RELAY_PRINCIPLE.png
With a very low Power Input, we energize a Coil that is wound with very fine wire and many turns, therefore its currents are very low.
However, once that a Magnetic Field is generated at center core, it attracts the Upper Contacts, CLOSING the Higher Voltage, Higher Amperage of the two Right Contacts.
The setback of a Relay, is that at higher frequencies, it may not have the Fast Switching Response Properties as an Electronic Solid State MOSFET Transistor would have.
And we need here to be able to drive at frequencies that go from 50 to 100 Hertz.
Regards
Ufopolitics
THE SIGNALS ANALYSIS
EDIT: Please do NOT misinterpret the Red Signals in an ESCALATING GRAPHIC AS they "WOULD BE" on an INCREASE-DECREASE of Power!!
ALL SIGNALS CARRY THE SAME POWER (V&A) AT ALL TIMES!!, LIKE IS SHOWN A FLAT RED LINE ON RIGHT IMAGES OF POWER VERSUS SIGNALS SEQUENCE
Hello,
Ok, here I want to show the True Signals we are achieving with this DSS Driver:
NO_OVERLAPPED_SIGNALS_100_DUTY_.png
We will be able to regulate Frequency (speed) from Zero to 100 Hz, as also the Duty Cycle, HOWEVER,
I highly recommend running at 100% Duty Cycle (No Time OFF on each signal)As represented on Graphic above.
However, each Sequential Signal, would collapse straight down, on a vertical line (zero time off), as soon as next signal is turned ON, like shown on image below:
ON_OFF_SIGNALS_100_DUTY_CYCLE.png
Same way that turning ON each signal, would also be in a Vertical Line (instant ON)
So, this part is NOT the same way that Commutator-Brush Switching works, where there is always an "Overlapped" Time in between signals, when Brush is switching from a contact to the next, there is ALWAYS a "Make Before Brake"...:
OVERLAPPING_SIGNALS_100_DUTY_CYCLE.png
However, at higher speeds Switching, this slight difference is almost not noticeable, if we are running at 100% Duty Cycle.
Plus, remember ALL Sequential Exciter Coils are in SERIES CONNECTIONS between ALL of them, so, it will NEVER be a collapsing, like in a Parallel Connection would take place.
Regards
Ufopolitics
CIRCUIT BOARDS SCHEMATICS (VERSION 1)
Hello All,
Ok, first, All Logic Sequential Circuit running to Higher Voltage at MOSFET Boards (Both, P & N FETS) are Protected by OPTO-COUPLERS.
This is done to protect Logic Board sensitive components at the event of a short circuit taking place at any of the MOSFET's terminals, basically shorting Gates with Source or Drain, whenever dielectric insulation melts, resulting in a full short circuit.
LOGIC BOARD SCHEMATIC (VERSION 1)
LOGIC_CIRCUIT_DUAL_SWITCHING_BOARD.png
N-FET CIRCUIT SCHEMATIC (VERSION 1)
N_FET_OPTO_SCHEMATIC.png
P-FET CIRCUIT SCHEMATIC (VERSION 1)
P_FET_OPTO_SCHEMATIC.png
CIRCUIT BOARDS DESIGN AND CONNECTIONS (VERSION 1)
ALL_CIRCUIT_BOARDS_DUAL_SWITCHING_CONNECTIONS.png
Ufopolitics
Hello to All,
Ok, as you have all noticed, the Logic Board Out Terminal (15 Pins) Sends its Switching Signals (1-8/8-1) to BOTH MOSFET (P & N) Boards.
This means that Both, P-FETs and N-FETs would be receiving the same EXECUTION SIGNAL to each Gate in the Sequence, and this design guarantees a perfect UNISON Contact for all Positive and Negative terminals of our Exciting Coils.
At the same token, ALL Regulation Controls (PWM/FREQ) are at the Logic Board, so, when we regulate speed (Hz), it will be evenly distributed to the High (+) and Low (-) Sides perfectly at UNISON.
This way we will never have a Coil on the sequence left without powering it.
It took a very long thread of emails exchange to reach this final design between Kamper and me, as I was trying to duplicate the Mechanical Switching Properties, as close as Solid-State Electronics Switching would allow.
We started the first designs with the Single Switching Schematics, where only Positive is being switched, until I came up with the Dual Switching design, so, we (Kamper and I) had to start from scratch again...
The work done by Member Kamper and his Team at the Netherlands is amazingly well done!!
Now He is in the process of ordering all components and order the Circuit Boards to be printed.
Regards
Ufopolitics
Great work you guy's, i know how much time goes into developing things like this, Congrats.
I am going to go with a double 32 bar Commutator, but please put me down for some of those boards, will gladly pay for your work.
Best Regards Cornboy. :)
Quote from: Cornboy on May 19, 2024, 06:34 PMGreat work you guy's, i know how much time goes into developing things like this, Congrats.
I am going to go with a double 32 bar Commutator, but please put me down for some of those boards, will gladly pay for your work.
Best Regards Cornboy. :)
Hello and many thanks for all your big help here!!
I know that you like better the Mechanical Switch, as I do as well, but going Solid State would be great, a completely silent driver!!
Right now, this Development is in the Beta Stage, Kamper is getting these PCB Boards made and tested at Infinion, Germany...They have a minimum order of 10
I will be getting one set, for testing on my coils, plus scoping them, and checking all adjustments are as expected.
Best Regards Friend!!
Ufopolitics
Hello All,
These 3D Images of assembled Boards were done by Member
@kampen , on the beginning of our development.
3D_ASSEMBLED_LOGIC_BOARD.jpg
3D_ASSEMBLED_NFET_BOARD.jpg
Regards to All
Ufopolitics
Hello All,
And here is a very short video from Kampen, about the Dual Switching Circuit on the starting process, testing on a bread board for a single signal switched by Positive-Negative.
Regards
Ufopolitics
Congratulations UFOpolitics!
I've been waiting a long time for you to move from mechanical commutator to electronic control. I did not want to impose the opinion that mechanics is no more than a proof of concept.I also already had the experience of developing a cascade of coils for a pulse device, on very simple elements. I only came to the question of power switches of the PNP transition.I encountered another problem, it is the reverse EMF at the moment of disconnection of the coil. If shunted with a diode, it greatly affects the collector (output) circuit EMF. If you put a simple snubber (RC), the reverse pulse voltage exceeding the transistor's capability kills it (your transistor has 100V limit). Under load there are no surges, but at idle or sudden change of load there may be trouble.You may not have large inductances and voltage spikes, just be aware that there is such a problem.
Once again congratulations on taking it to the next level.
Quote from: rakarskiy on May 20, 2024, 01:15 AMCongratulations UFOpolitics!
I've been waiting a long time for you to move from mechanical commutator to electronic control. I did not want to impose the opinion that mechanics is no more than a proof of concept.
Hello Rakarskiy,
And thanks!
However, I disagree that mechanical is only for proving of concept...Brushed Motors, for example, have been on the market for a very long time, even after many other motor's methods have come up, still brushed motors has prevailed as having faster response, better torque, etc.
Mechanical switching is very reliable, and as a matter of fact, there are "things" that electronics can NOT do on this simple type of switching, for example, being able to Overlap between contacts plus regulate these overlapping gaps.
Quote from: rakarskiy on May 20, 2024, 01:15 AMI also already had the experience of developing a cascade of coils for a pulse device, on very simple elements. I only came to the question of power switches of the PNP transition.I encountered another problem, it is the reverse EMF at the moment of disconnection of the coil. If shunted with a diode, it greatly affects the collector (output) circuit EMF. If you put a simple snubber (RC), the reverse pulse voltage exceeding the transistor's capability kills it (your transistor has 100V limit). Under load there are no surges, but at idle or sudden change of load there may be trouble.You may not have large inductances and voltage spikes, just be aware that there is such a problem.
You have written it yourself above...the electronic switching has all those disadvantages, it will NOT happen with a Comm-Brush scenario.
Now, remember that on this new design, ALL COILS ARE IN SERIES, therefore, there is NEVER a FULL DISCONNECTION whenever swapping contacts, because coil behind (is never "disconnected")
is still connected to the COIL'S SERIES CHAIN, behind AND in front.
A Parallel Connection of all coils would definitely be a FET killer by BEMF, BUT this is not the case here.
Quote from: rakarskiy on May 20, 2024, 01:15 AMOnce again congratulations on taking it to the next level.
Thanks, so far I believe this type of Dual Switching is designed very robust, and of course, it also depends on the Capacity of the MOSFET'S you are using.
We can add FET'S there that can handle up to 600V and up to 15-20 Amps, and still be Ultrafast switchers.
Now, do you remember a Test I made and uploaded a video about it, where I am capturing all the Energy generated by Self-Induction from the Exciter Coils?
Once you do that, ALL the BEMF is transferred to another circuit, where it can be stored and reused...
As, by doing this, we are diminishing all "kickback" BEMF from coils reversals.
Regards
Ufopolitics
Quote from: Ufopolitics on May 20, 2024, 11:28 AM...and as a matter of fact, there are "things" that electronics can NOT do on this simple type of switching, for example, being able to Overlap between contacts plus regulate these overlapping gaps.
Hello All,
On my previous post, I was citing what "apparently" cannot be done in Electronics-Solid State Drivers, like it was not being able to overlap signals and regulate them.
Well, this was due to a long exchange of emails with Member Kampen, and I agree to just leave it without the overlapping, since it was too complicated to achieve it.
But Kampen wanted to make the Design "PERFECT", without anything left behind...so, just yesterday I received this email from him:
***********************************************
Good afternoon Ufopolitics,
I am sending this email:
The NEW Commutator LOGIC Diagram-Schematics with Overlapping Timing and explanation.SS-Commutator Overlapped Timing appears to be a specific concept within the realm of VLSI (Very-Large-Scale Integration) design, particularly relevant to the timing analysis and optimization of synchronous sequential circuits.
Although "SS-Commutator Overlapped Timing" might not be a standard term broadly recognized in literature, it likely relates to advanced techniques used to manage and optimize the timing of signals in complex digital circuits.
Breakdown of the Concept1. SS (Synchronous Sequential) Circuits: These circuits use a clock signal to coordinate the changes in state. They include sequential elements (like flip-flops) and combinational logic that require precise timing to ensure correct operation.
2. Commutator: In a broader sense, a commutator refers to a device that periodically reverses the direction of current in an electric circuit. In the context of VLSI and timing, it might imply a mechanism or methodology that dynamically adjusts or shifts timing paths or phases within a circuit.
3. Overlapped Timing: This involves the strategic overlapping of timing windows to improve the efficiency of operations within a clock cycle. Overlapped timing helps in utilizing the clock cycle more effectively by allowing multiple operations to occur simultaneously without causing timing violations.
Understanding SS-Commutator Overlapped TimingIn VLSI design, managing the timing of synchronous sequential circuits is critical for achieving high performance and reliability. SS-Commutator Overlapped Timing can be understood as follows:
Dynamic Timing Adjustments: The concept of a "commutator" suggests dynamic adjustments in timing paths or phases. This could involve techniques where certain signals or operations are shifted within the clock cycle to optimize performance and meet timing constraints.
Efficiency in Clock Cycles: By overlapping timing windows, designers can ensure that multiple operations can be valid within the same clock cycle, thereby improving the throughput and efficiency of the circuit.
Managing Setup and Hold Times: Setup time is the period before the clock edge during which data must be stable, and hold time is the period after the clock edge during which data must remain stable.
Overlapping timing windows can help manage these constraints more effectively by allowing a buffer period for different operations.
Timing Analysis Tools: Tools like Static Timing Analysis (STA) are essential for evaluating the timing of circuits. Overlapped timing must be carefully analyzed to ensure that all signal paths meet the required setup and hold times, avoiding timing violations.
Practical Implications in DesignIncreased Throughput: Proper management of overlapped timing can lead to higher throughput as more operations are completed within a given period. This is crucial for high-speed digital systems.
Power Efficiency: Optimized timing can allow the circuit to operate at lower frequencies while maintaining performance, leading to reduced power consumption.
Design Complexity: Implementing SS-Commutator Overlapped Timing can add complexity to the design process, requiring sophisticated techniques and careful analysis. However, the payoff is a more efficient and reliable circuit.
Advanced Optimization Techniques: Techniques such as clock skew management, retiming, pipelining, and dynamic timing adjustments are employed to achieve effective overlapped timing. These techniques help in distributing the timing load more evenly across the circuit.
ConclusionSS-Commutator Overlapped Timing is an advanced concept in VLSI design focused on optimizing the timing of synchronous sequential circuits.
It involves dynamically adjusting timing paths and overlapping timing windows to maximize the efficiency and performance of the circuit.
By carefully managing setup and hold times and using sophisticated timing analysis tools, designers can create high-performance, power-efficient digital systems.
See attachment: Diagram_Cmos-Logic overlap Vers.01. PDf file.
Diagram_Cmos-Logic overlap_FF_Vers.png
Enjoy and Have a nice day.
Greetings, Alex
****************************************
So, Alex achieved it!!
He did NOT give up!!, and kept testing and developing to reach the overlapping of Dual (Positive-Negative Signals at Unison)...adding the Clocks Chips plus all the needed components to achieve and regulate overlapping percentage:
The Logic Board had to be redesigned from scratch, as also some modification to the Switching FET Boards:
NEW LOGIC BOARD
NEW_LOGIC_BOARD_OVERLAPPING.jpg
Regards to All
Ufopolitics
Hello All,
Ok so here Member Kamper is done with the Boards Design and Modeling of the whole Driver including the Overlap Function.
These Overlap Control (Potentiometer) would be on the CMOS Logic Board, and it can turn completely OFF (Zero overlap) or drive it all the way to 25%.
On this new Logic Control Board there would be two separate outputs to FET Boards, 8 pins for the NFET's Board and 8 pins for PFET's Board.
Overlap_Total_Diagram.jpg
THE NEW NFET BOARD:
NFET_PCB_ Overlapped_Version.jpg
AND THE PFET BOARD:
PFET_LAP_BOARD.jpg
Member Kampen is doing an awesome job!!
Let's Congratulate him!!
Regards to All
Ufopolitics
Thank you Kampen and UFO for your work!
I want to make your driver. Can you upload schematic diagram, parts list and PCB schematic?
Thank you!
Spagiricus
@ All,
This Solid State Overlapping Timing PCB is under development.
These 3 PCBs are prototypes that need now to be produced and assembled then functionality testing the Input and Output as required needs to monitor the timing signals and ensure they overlap as intended.
Then it will be TESTED by Ufopolitics.
Once the Overlapping Timing PCBs have been tested and their functionality has been verified, they will be ready for availability.
By following these steps, we can effectively use pooling to order these Overlapping Timing PCBs,
fully assembled and electronically tested them.
This process ensures cost efficiency and timely production for all users.
Greetings, Alex
REAL BOARDS UNDER CONSTRUCTION
Member Kampen sent this images of real boards under construction, there are some parts still missing and expecting to arrive soon, then they would be hand soldered to boards.
All parts were not in at time of Board's final assembly at Infineon, Germany.
LOGIC BOARDS UNDER CONSTRUCTION
LOGIC_BOARD_ASSEMBLING.jpg
N-FET BOARDS (FULLY ASSEMBLED EXCEPT FOR ONE SMALL E-CAP MISSING)
NFET_BOARD_UNDER_CONST.jpg
P-FET BOARDS (MISSING P-MOSFET PLUS OTHER TWO COMPONENTS)
PFET_BOARD_UNDER_CONST.jpg
BUILDING THE CONNECTING RIBBON HARNESSES
RIBBON_CONNECTING_HARNESS_1.jpg
RIBBON_CONNECTING_HARNESS_2.jpg
Regards
Ufopolitics
Thanks Kampen, much appreciated.
Cornboy. :)
Hello All,
Here is a video that Kampen sent me on Testing ALL Boards,
I have edited video as adding Titles plus also set the second part as a "repeat" of same track, but in slower motion (180%) to be able to observe the in-between contact switching plus the overlapping.
And...it looks GREAT!!...The Incandescent Bulbs look like are "flowing" very smoothly...I can picture magnetic fields also moving same way.
Thanks Kampen for all your hard work!!
Regards
Ufopolitics
Hello All,
Here is another short video of the testing, now all boards are completed and tested.
@kampen [color=var(--input-txt-color)]
is on vacation for three weeks, and this video was sent by one of his colleagues that is working at lab to finalize this testing.[/color]
Regards
Ufopolitics
Hello to All,
Here is a short video about a test on the overlapping function:
The overlapping function have a Red LED on the Logic Board, and as it brightens it means the overlap have increased to a max.
As when it dims it has been reduced.
We can observe the FLOW of the moving light becoming wider when is at max, or shrinking when overlap is decreasing to off, basically on the slow-motion track.
The Overlap Function is simply a delay of the Field Trace, as it comprehends a longer time between switching.
This enhances and strengthens the Induction.
Ufopolitics
Hello to All,
First, I want to dedicate this post to the great work and devotion that member
@kampen and his team at the Netherlands have made to make these Solid State 'Plug & Play' Switching Systems for all of us!!
I will never end to THANKS HIM and HIS TEAM for all this excellent development!!
As I think YOU ALL should thank him as well.
The shipment is on my way to me, and should be arriving anytime...:
20240704_113729.jpg
20240704_121407.jpg
Kampen sent me Two sets of each Version, 1 & 2.
Version 1 is without the overlapping feature, as Version 2 have overlapping.
I will conduct all testing as I have mentioned on my other Figuera Topic, but I missed to add that I will test all Four Sets following same procedure as explained there:
FIGUERA'S AETHER MAGNETIC FIELDS LINEAR PUMP, REVIVED - Page 59 (overunitymachines.com) (https://overunitymachines.com/index.php/topic,5.msg1648.html#msg1648)
Then I will get to know how much difference the Overlapping will do, related to Output, based on the exact Input for All Tests.
Finally, I have asked Kampen, to send me the detailed Diagrams for Both Versions, with all parts spec's, so, I can post them here.
In case anyone would like to make their own boards, to have here all building details.
I am very excited to finally test this Solid-State Switching System!!
On the Mechanical Switch, I was very limited when trying to accelerate motor, because not even reaching the 2600 RPM's, the contacts start to fail...and whole thing collapsed or decreased, as you all witnessed on all my videos.
Basically, whenever I had the Output under a Load.
These Electronic Boards are able to drive my System over the 60 Hertz and up to 100 Hertz...completely silent!!
Many THANKS again
@kampen and his team!!
Regards to All
Ufopolitics
Thank you Kampen for your dedication and time consuming work.
Warmest regards Cornboy :)
@ Ufopolitics,
Dear, please check Your email sent You the wiring diagram and BOM files.
Greetings, Alex
Hola a todos:
Kampen, te felicito por el trabajo realizado tan desinteresadamente, mi total agradecimiento desde España, creo que todos necesitábamos un controlador como este...
Saludos
VERSION 1 BOM FILES (NO OVERLAPPING)
Hello to All,
Ok, here are the BOM (Bill of Materials) Files for VERSION 1, ALL Boards Components.
They are all in pdf format.
Next I will upload the V2, BOM Files.
Regards
Ufopolitics
VERSION 2 (OVERLAPPING-SEQUENCE BOM)
Ok, here are the BOM (Bill of Materials) Files for VERSION 2, ALL Boards Components.
They are all in pdf format.
Regards
Ufopolitics
Hello to All,
Ok, so previously I have uploaded ALL Diagrams related to the FIRST VERSION that Kampen developed and built, before the Overlapped VERSION 2 was designed.
Therefore, I have updated that Post where Diagrams are, by adding (VERSION 1) to Post and all images:
FIGUERA GENERATOR SEQUENTIAL DUAL (+/-) SOLID-STATE DRIVER DEVELOPMENT (overunitymachines.com) (https://overunitymachines.com/index.php/topic,66.msg1442.html#msg1442)
On next post I will upload the FULL DIAGRAMS OF VERSION 2, that Kampen already send me.
Regards
Ufopolitics
VERSION 2 (OVERLAPPED) SCHEMATIC DIAGRAMS OF THREE BOARDS
Hello All,
Ok, on the LOGIC BOARD DIAGRAM, there are TWO (2) VERSIONS:
1- Original before Kampen developed the LED Brightness to show percentage of overlapped signals.
2- After the LED Signaling is developed, second board diagram includes the extra circuit fort LED.
LOGIC BOARD DIAGRAM (NO LED)
V2_LOGIC_BOARD_NO_OVERLAP_LED.png
LOGIC BOARD DIAGRAM WITH OVERLAP SIGNAL LED
V2_LOGIC_BOARD_WITH_OVERLAP_LED.png
V2 NFET BOARD
V2_NFET_FINAL.png
V2 PFET BOARD
V2_P_FET_FINAL.png
On the bottom of post are all four PDF Original Files that Kampen sent me.
If you noticed there is a minor difference (between FET BOARDS PDF Files to be downloaded and Images on Post) on the INPUT of the EIGHT Connectors of FET BOARDS (N & P) because on original PDF , CONNECTORS U8 & U10 are not following the 12345678-sequence related to FET 12345678 NUMBERS.
BOTH LOGIC BOARD PDF DIAGRAM FILES ARE PERFECT.
But the PDF Files are much cleaner to ZOOM every component number that my modified images on post.
Not a big deal at all, just a minor sequence Input ordering error.
Ufopolitics
UFO, a quick question about how the circuit operates. Does the sequence of output go 1,2,3,4,5,6,7,8,8,7,6,5,4,3,2,1,1,2......or is the sequence 1,2,3,4,5,6,7,8,7,6,5,4,3,2,1,2,....?
Is the sequencing programable? Thanks for the information.
GreyWolf47
Quote from: GreyWolf47 on Dec 17, 2024, 04:52 PMUFO, a quick question about how the circuit operates. Does the sequence of output go 1,2,3,4,5,6,7,8,8,7,6,5,4,3,2,1,1,2......or is the sequence 1,2,3,4,5,6,7,8,7,6,5,4,3,2,1,2,....?
Is the sequencing programable? Thanks for the information.
GreyWolf47
Hello Grey Wolf,
The sequence does NOT repeat #8 nor #1, so it is the second sequence you wrote, and that I bold out above.
However, on the overlapped version driver, there is a delay control (that causes overlap) that it can be increased or decreased from zero to 15-20%, but that will apply to all channels, from 1 to 8.
I have both versions to be tested, but I have not finished my main build yet.
I uploaded below a short video Kampen (Alex) did and sent it to me a while back, when he was still testing on a breadboard, it is the Non-Overlapped Version. But you can see a full continuity on 8 & 1.
Ufopolitics
SS-Commuter_Variabel_VID-20240420.mp4
@GreyWolf,
If you go to post:
FIGUERA GENERATOR SEQUENTIAL DUAL (+/-) SOLID-STATE DRIVER DEVELOPMENT - Page 4 (https://overunitymachines.com/index.php/topic,66.msg1539.html#msg1539)
You will see BOTH Drivers working...
Ufopolitics
UFO, Thanks for the quick reply and clarification on the sequencing. On my commutator, there are 16 contacts which make a sequence of 1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16. They are jumper wired in pairs as 1-16, 2-15, 3-14, 4-13, 5-12, 6-11, 7-10, 8-9. This does not seem to match the sequencing of the new digital setup. The digital seems to give only one pulse to 1 and 8 but gives a double pulse to 2,3,4,5,6,7. It is my opinion ( limited as it is) that this will not give enough time to those pulses 1 and 8 to match the others.
I am not yet finished with my buildout of what I believe is a very true replication of Figuera's device with the 14 primaries and 14 secondaries with the primaries wound in separate mini coils in the same fashion that you do as coils over the secondary coil.
Thanks again for all you are doing to get this project completed.
GreyWolf47
Quote from: GreyWolf47 on Dec 18, 2024, 02:31 PMUFO, Thanks for the quick reply and clarification on the sequencing. On my commutator, there are 16 contacts which make a sequence of 1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16. They are jumper wired in pairs as 1-16, 2-15, 3-14, 4-13, 5-12, 6-11, 7-10, 8-9. This does not seem to match the sequencing of the new digital setup. The digital seems to give only one pulse to 1 and 8 but gives a double pulse to 2,3,4,5,6,7. It is my opinion ( limited as it is) that this will not give enough time to those pulses 1 and 8 to match the others.
Hello GreyWolf,
Thanks for sharing your analysis here!
Yes, I also noticed that sequence error on the Solid-State Driver(s), unfortunately by the time I mentioned it to Alex, He already had all drivers finished.
You have done an even deeper analysis here, and the result you found out is that we are only FULLY DOUBLE Pulsing Six (6) Coils per Cycle (2, 3, 4, 5, 6, 7).
If we carefully look at short video with the incandescent light bulbs at SLOW MOTION 180%, we can clearly notice that the end bulbs [1 & 8] are not getting a full illumination:
However, this issue has a simple solution without having to modify the design of the driver(s)...
And that is to REDUCE the RESISTANCE on Coils One (1) and Eight [8], by simply a couple of Ohms less or a few lesser turns.
This will cause that Currents (Amperage) Increase only at those two points [1 & 8] and so Magnetic Field will also Intensify or gain strength at both end points.
So, that will "compensate" the shorter time ON, at those two intervals with Higher Currents rushing in.
I am also pretty sure this also have a simple Electronic Solution at the two end output points, as a small capacitor would delay the timing at those two points.
But here
@kampen will give us the professional solution to this matter.
I thanks you again, @GreyWolf for bringing this up, as now I am working precisely on getting the sequential coils mold pattern for my Linear Setup.
Regards
Ufopolitics
EDIT 1: I still have to CALCULATE this issue in more detail, about the resistance reduction at the end coils #1 & #8...
because I want to ALWAYS have a Total of 50 Ohms on Eight Coils at ALL TIME during the sequencing on my latest Linear Dual Pulsing (-/+):
MAGNETIC_PISTONS_VS_SINEWAVES.png
Quote from: GreyWolf47 on Dec 18, 2024, 02:31 PMI am not yet finished with my buildout of what I believe is a very true replication of Figuera's device with the 14 primaries and 14 secondaries with the primaries wound in separate mini coils in the same fashion that you do as coils over the secondary coil.
Thanks again for all you are doing to get this project completed.
GreyWolf47
Hello again GreyWolf,
Now, if as you have mentioned above (on bold and underlined statement by me) that you are making a "true" replication of Figuera's Device...
I must remind you that Points 1 and 8 -as Figuera 1908 Patent- are direct positive flow to Primaries, meaning, no resistance, no coils involved on those two points (1-16) (8-9) regardless of timing sequence.
On these two points primaries electromagnets receive FULL POWER.
patent1908.jpg
Ufopolitics
UFO, Thanks again for that information. I will be posting some schematics on my thread soon so as to not clutter up your work here. I will say here that ALL primary coils receive the full 12 volt directly from the commutator with no resistance but in a ordered sequence that moves the flux first increasing in one direction and then decreasing back to zero and then the sequence starts at the opposite end of the same primary increasing in 4 steps and then back to zero.
Thanks again
GreyWolf47
@ All,The digital Commutator seems to give only one pulse to 1 and 8 but gives a double pulse to 2,3,4,5,6,7.It is my opinion ( limited as it is) that this will not give enough time to those pulses 1 and 8 to match the others. I still have to CALCULATE this issue in more detail, about the resistance reduction at the end coils #1 & #8... because I want to ALWAYS have a Total of 50 Ohms on Eight Coils at ALL TIME during the sequencing on my latest Linear Dual Pulsing (-/+): Your observation about the digital commutator providing single pulses to coils 1 and 8, while double pulses are applied to coils 2-7, raises an important concern about timing balance and resistance distribution across all coils.Key Concerns:- Pulse Timing Mismatch:
- If coils 1 and 8 receive only a single pulse, they may not contribute the same force as coils 2-7, leading to uneven acceleration or gaps in movement.
- This could disturb the smooth linear motion, introducing jerking or asymmetry in the displacement.
- Resistance Balancing Across Coils:
- You want to always maintain a total of 50 Ohms across 8 coils.
- End coils (1 & 8) have a reduced number of pulses, so they may experience lower total resistance than coils 2-7.
- If the resistance drops too much, current distribution will change, affecting magnetic field uniformity.
Mathematical Analysis: Pulse Timing vs. ResistanceTo analyze this, we need to calculate the effective resistance in different pulse conditions.Step 1: Resistance Per CoilEach coil has an individual resistance of:Rcoil=50 Ohms8=6.25 OhmsR_{\text{coil}} = \frac{50\text{ Ohms}}{8} = 6.25 \text{ Ohms}Rcoil=850 Ohms=6.25 Ohms Step 2: Effective Resistance in Different Pulse Sequences- If all 8 coils are active equally:
Rtotal=6.25×8=50 OhmsR_{\text{total}} = 6.25 \times 8 = 50 \text{ Ohms}Rtotal=6.25×8=50 Ohms - If coils 1 & 8 receive only single pulses, while 2-7 receive double pulses:
- The relative activation time of coils changes.
- The end coils contribute less resistance due to lower activation.
To verify the actual resistance variations, see below effective resistance changes based on pulse sequencing.Here the detailed calculations now.Resistance Distribution & Effective ResistanceCoil Number | Pulse Factor | Effective Resistance (Ohms) |
1 | 1 | 3.571428571428571 |
2 | 2 | 7.142857142857142 |
3 | 2 | 7.142857142857142 |
4 | 2 | 7.142857142857142 |
5 | 2 | 7.142857142857142 |
6 | 2 | 7.142857142857142 |
7 | 2 | 7.142857142857142 |
Calculated the effective resistance distribution for each coil based on the pulse timing. You can review the table to see how the resistance varies due to the single vs. double pulse sequencing.Key Observations:- End Coils (1 & 8) Have Lower Resistance (~3.57 Ohms)
- Since coils 1 and 8 receive only one pulse, their resistance contribution is lower than expected.
- This means they will heat up less and generate weaker magnetic force.
- Middle Coils (2-7) Have Higher Resistance (~7.14 Ohms)
- These coils receive double pulses, making them stronger electromagnetically.
- However, this also increases the overall power draw in those sections.
- Total Effective Resistance is Maintained Near 50 Ohms
- If your goal was to always keep 50 Ohms, the method you are using does work in an approximate manner.
- However, magnetic field strength is not uniform, which could impact motion smoothness.
Next Steps & FixeAdjust the pulse sequencing to equalize resistance across all coils while keeping the same 50 Ohm total? We could try:- Giving coils 1 & 8 slightly longer pulses.
- Reducing the double pulse effect on coils 2-7.
- Tweaking coil current to compensate for resistance imbalances.
Hope this will be any help.
Hello Dear Alex,
Yes, all your calculations and conclusions are right, BUT ONLY BECAUSE we are calculating based on analyzing "a single coil".
I did the same mistake before, then tried (in my mind) to reduce resistance on Coils # 1 & 8, and I will tell you that these resistance reductions on just 1 & 8, it WILL NOT WORK.
Simply because we will end up having all different resistances TOTAL VALUES on the EIGHT Coils, causing the Field to alternate strength due to resistance fluctuations, during travel.
We do NOT want that!!
So, after going over many times on this issue... until I realized I was making a mistake by only being concerned about TWO Coils out of Eight that ALWAYS stay ON during sequence.
First, we need to understand that the Magnetic Field is
always generated by Eight Coils. No matter which sequence of coils.
Second, please let's understand the way this sequence works...according to our setup, pulsing a chain of Negative Contacts [1-8] and a Chain of Positive Contacts [1-8] at unison and following the 1 through 8 sequence.
LINEAR_SERIES_SECOND_SECONDARIES.png
Third, on this linear design, we have two #1 coils and two #8 coils all in a Series-Linear fashion. However, each 1 & 8 are on negative PLUS on positive coils groups.
Therefore, we only "flash" contact 1 negative and contact 1 positive together, for a fraction of time, (this includes coil 1 and coil 8 on the negative side group, plus coil 1 on positive side group) and that is
when magnetic field has reached the extreme end travel, say left side (according to image above).
As also again, when field has traveled to the right extreme travel it flashes coils 1 & 8
on the positive group., plus coil 8 on negative groupHowever, during the "mid travel" of this virtual field are involved all coils from 2 to 7, negative and positive respectively.
As a final conclusion, that the FULL FIELD consists of the SUM of all eight coils, wherever the coil number are providing power. So, the way I see it is that if there would be a very minimal timing issue with coils #1 and #8, it will be disregarded to affect the whole field strength and spatial travel.
Finally, I will keep winding ALL Sequential Coils with the same resistance value, and that is 6.25 ohms per each coil, (I believe I have said that on the other thread)
simply because to me keeping the same exact resistance value for eight coils is the priority above anything else.I would like to apologize here, because I am going through critical health issues with my wife...and that has required that I leave everything else on a halt.
So, Alex, if you are working on this project, please keep going the way it was originally planned, because I know it will work perfectly well.
Maybe you will have much better results with the overlapped version of driver, because of issues I have written about on page 68-69 of my main Figuera Setup.
Regards to all
Ufopolitics
Subject: Wishing You Strength and Moving Forward
Dear Ufopolitics,
First and foremost, I am truly sorry to hear about the critical health issues you and your wife are facing.
My thoughts are with you both during this difficult time, and I sincerely hope for the best possible outcome.
Please take all the time you need to focus on what truly matters—your family and well-being.
Regarding the project: I completely understand and appreciate your guidance.
I will continue working on it as originally planned and will take a closer look at the overlapped version of the driver as you suggested.
I'll also review pages 68-69 of your main Figuera Setup to ensure everything aligns with your insights.
Take care, and please don't worry about anything here. Your health and your wife's well-being come first.
Wishing you both strength and healing.
Best regards,
Alex